1. Field of Invention
The present invention relates to a metal-insulator-metal (MIM) capacitor and a manufacturing method thereof, more particularly to a structure with MIM capacitor and a manufacturing method thereof adopting copper interconnection technology.
2. Description of Related Arts
With development of the very large scale integrated (VLSI) circuit, the area of capacitor is scaled down according to the Moorelaw. However, in order to assure the performance of capacitor, such as leakage, breakdown voltage, voltage linearization, MIM capacitor is a key element. MIM capacitor is usually of a sandwich structure. The upper metal electrode and lower metal electrode are separated by a thin insulation layer. In conventional MIM capacitor using Aluminum interconnection technology, Al Cu alloy has been used. Currently, Copper has replaced Aluminum becoming a main stream interconnection technology in VSLI. Therefore, MIM capacitor with copper electrode has been widely used.
In copper interconnection technology, a copper dual damascene process is adopted, as shown in FIG. 1, including the following steps of: (1) depositing a thin etch stop layer (Si3N4); (2) then depositing an insulation layer with a predetermined width on the etch stop layer; (3) then photoetching a via; (4) etching a part of the via; (5) then photoetching a trench; (6) etching the integral via and the trench; (7) then sputtering physical vapor deposition (PVD) diffusion barrier (TaN/Ta) and copper seed layer, wherein Ta is to increase the adhesiveness of Cu, and the seed layer serves as a conductive layer during plating; (8) plating a copper interconnection wire; (9) annealing, chemical mechanical polishing the product, and planarizing and rinsing the copper plating layer. The process of producing an MIM capacitor with copper electrode needs to be compatible with the copper interconnection process.
With increasing of the integration level of the integrate circuit, the capacity of the capacitor needs to be increased within the limited area.